Journal: Software Quality Journal

Article Title: Clone detection in MATLAB Stateflow models

doi: 10.1007/s11219-015-9296-0

Figure Lengend Snippet: Fig. 1 A simple example of a Stateflow block within a Simulink model

Article Snippet: In MATLAB, all Simulink and Stateflow models are stored in model files with the .mdl extension.

Techniques: Blocking Assay

Journal: Software Quality Journal

Article Title: Clone detection in MATLAB Stateflow models

doi: 10.1007/s11219-015-9296-0

Figure Lengend Snippet: Fig. 2 A simple Stateflow chart example. The chart is the parent of the state A, and state A is the parent of the B, C, and D states. Exclusive state D1 and D2. Parallel state C1 and C2. The chart also includes a history junction and a Simulink function, and transition junctions

Article Snippet: In MATLAB, all Simulink and Stateflow models are stored in model files with the .mdl extension.

Techniques:

Journal: Software Quality Journal

Article Title: Clone detection in MATLAB Stateflow models

doi: 10.1007/s11219-015-9296-0

Figure Lengend Snippet: Fig. 5 Example of a type 1 (exact) clone in a Stateflow model. Both a Hydraulic Monitor and b Position Monitor in the MATLAB sf_aircraft_screen_library demo model, and they contain the same number of states and transitions. The two failure_logging states can be considered as the cloned fragments

Article Snippet: In MATLAB, all Simulink and Stateflow models are stored in model files with the .mdl extension.

Techniques: Clone Assay

Journal: Software Quality Journal

Article Title: Clone detection in MATLAB Stateflow models

doi: 10.1007/s11219-015-9296-0

Figure Lengend Snippet: Fig. 6 Example of a type 2 (renamed) clone in a Stateflow model. Both are in the MATLAB demo powerwindow model. a driverDown Substate, b driverUpn Substate

Article Snippet: In MATLAB, all Simulink and Stateflow models are stored in model files with the .mdl extension.

Techniques:

Journal: Software Quality Journal

Article Title: Clone detection in MATLAB Stateflow models

doi: 10.1007/s11219-015-9296-0

Figure Lengend Snippet: Fig. 11 Example of Stateflow clones from sldemo_auto_climate_elec.mdl and sldemo_auto_climatecon- trol.mdl in MATLAB demo automotive models. a Climate control system/temperature control chart, b temperature control chart

Article Snippet: In MATLAB, all Simulink and Stateflow models are stored in model files with the .mdl extension.

Techniques: Clone Assay, Control

Journal: Micromachines

Article Title: Design of an FPGA-Based Fuzzy Feedback Controller for Closed-Loop FES in Knee Joint Model

doi: 10.3390/mi12080968

Figure Lengend Snippet: Hardware measurement setup using an Intel field-programmable gate array (FPGA) (DE2-115) board, an ADC (ADC0804) circuit, a rotary 10k ohm potentiometer and a digital oscilloscope.

Article Snippet: This section discusses the results of synthesized digital FFC using the Intel FPGA (Cyclone IV E) chip (Terasic Inc., Hsinchu, Taiwan), register transfer level (RTL) simulation results in a digital simulator timing waveform, real-time hardware measurement, comparative analyses between hardware measurement and simulation results, and HDL co-simulations for system level verification in MATLAB Simulink.

Techniques:

Journal: Micromachines

Article Title: Design of an FPGA-Based Fuzzy Feedback Controller for Closed-Loop FES in Knee Joint Model

doi: 10.3390/mi12080968

Figure Lengend Snippet: Schematics of the synthesized digital FFC using the Intel FPGA (Cyclone IV E) chip; ( a ) Internal architecture of the digital FFC; ( b ) Internal architecture of the digital FLC.

Article Snippet: This section discusses the results of synthesized digital FFC using the Intel FPGA (Cyclone IV E) chip (Terasic Inc., Hsinchu, Taiwan), register transfer level (RTL) simulation results in a digital simulator timing waveform, real-time hardware measurement, comparative analyses between hardware measurement and simulation results, and HDL co-simulations for system level verification in MATLAB Simulink.

Techniques: Synthesized

Journal: Micromachines

Article Title: Design of an FPGA-Based Fuzzy Feedback Controller for Closed-Loop FES in Knee Joint Model

doi: 10.3390/mi12080968

Figure Lengend Snippet: Synthesis summary report of the digital Fuzzy Feedback Controller (FFC) using the Intel field-programmable gate array (FPGA) (Cyclone IV E) chip.

Article Snippet: This section discusses the results of synthesized digital FFC using the Intel FPGA (Cyclone IV E) chip (Terasic Inc., Hsinchu, Taiwan), register transfer level (RTL) simulation results in a digital simulator timing waveform, real-time hardware measurement, comparative analyses between hardware measurement and simulation results, and HDL co-simulations for system level verification in MATLAB Simulink.

Techniques: